Signals & System Lect 8 | Power signals (important ponts) | Solved Problems

 

 

ECT 204 SIGNALS AND SYSTEMS
Topics covered
00:00 Intro
00:21 Power signal conditions & important points
02:24 Problem 1 & Solution
05:56 Problem 2 & Solution
10:23 Problem 3 & Solution
14:11 Problem 4 & Solution


Signals & System sudy in easiest way (Malayalam)
Lect 1 (Intro to Signals, elementary signals) : https://youtu.be/R7zMorWcJYw
Lect 2 (continuous & discrete time signals, Signal operations) : https://youtu.be/nsPKeusMeyI
Lect 3 (Signal operations , Solved Example questions): https://youtu.be/GHzZXFBhUhU
Lect 4 ( Classification of signals) : https://youtu.be/t5pp4cwFlgk
Lec 5 (fundamental time period & Solved problems) : https://youtu.be/tyAwjiN66l0
Lect 6 ( Even & Odd signals , Solved Problems) : https://youtu.be/8mqbP7r0h2A

Lect 7 (Energy Signals & solved problems) : https://youtu.be/yrGMDHIK3QM


Other subjects videos
EST 200 : Design & Engineering : https://youtube.com/playlist?list=PL5GLDcBhbkC_Nl4L86BWigB9VAprHroTP


find more here
https://sites.google.com/view/iammanuprasad/teaching-stuff

Signals & System Lect 6 | Even & Odd signals | Solved Problems

 

ECT 204 SIGNALS AND SYSTEMS

Topics covered
00:00 Introduction to even & odd signals
02:08 Problem 1 & Solution
05:14 Problem 2 & Solution
09:53 Problem 3 & Solution
12:46 Problem 4 & Solution


Signals & System sudy in easiest way (Malayalam)
Lect 1 (Intro to Signals, elementary signals) : https://youtu.be/R7zMorWcJYw
Lect 2 (continuous & discrete time signals, Signal operations) : https://youtu.be/nsPKeusMeyI
Lect 3 (Signal operations , Solved Example questions): https://youtu.be/GHzZXFBhUhU
Lect 4 ( Classification of signals) : https://youtu.be/t5pp4cwFlgk
Lec 5 (fundamental time period & Solved problems) : https://youtu.be/tyAwjiN66l0


Other subjects videos
EST 200 : Design & Engineering :
https://youtube.com/playlist?list=PL5GLDcBhbkC_Nl4L86BWigB9VAprHroTP

find more here
https://sites.google.com/view/iammanuprasad/teaching-stuff

Signals & System Lect 7 | Energy signals | Solved Problems

 

ECT 204 SIGNALS AND SYSTEMS

Topics covered
00:00 Introduction to Energy Signals
00:47 Problem 1 & Solution
07:25 Problem 2 & Solution
10:30 Problem 3 & Solution

Signals & System sudy in easiest way (Malayalam)
Lect 1 (Intro to Signals, elementary signals) : https://youtu.be/R7zMorWcJYw
Lect 2 (continuous & discrete time signals, Signal operations) : https://youtu.be/nsPKeusMeyI
Lect 3 (Signal operations , Solved Example questions): https://youtu.be/GHzZXFBhUhU
Lect 4 ( Classification of signals) : https://youtu.be/t5pp4cwFlgk
Lec 5 (fundamental time period & Solved problems) : https://youtu.be/tyAwjiN66l0
Lect 6 ( Even & Odd signals , Solved Problems) : https://youtu.be/8mqbP7r0h2A


Other subjects videos
EST 200 : Design & Engineering :
https://youtube.com/playlist?list=PL5GLDcBhbkC_Nl4L86BWigB9VAprHroTP

find more here
https://sites.google.com/view/iammanuprasad/teaching-stuff

HALF ADDER & FULL ADDER USING GATES.

 

AIM:

Realize the given expression using sum of product (SOP) & product of sum (POS) functions from K-map reduction

 

COMPONENTS AND EQUIPMENTS REQUIRED:

Sl. No	NAME OF THE COMPONENT	IC NUMBER	QUANTITY
1 2 3 3 4	AND gate OR gate XOR gate Connecting wires Trainer Kit	7408 7432 7486	1 1 1

 

THEORY:

ADDER: The simplest binary adder is called half adder. Half adder has two input bits and two output bits. One output bit is sum and other bit is carry. They are represented by s and c respectively in logic symbol. A half adder has no provision to add a carry from the lower order bits when binary numbers are added. When two input bits and carry are to be added, the number input bit become three and input combination increases to eight. For this a full adder is used like half adder, it also has a sum bit and carry bit. The new carry generated is represented by Cn and carry generated from the previous addition is represented by Cn-1.

Half Adder

 

Truth Table

A	B	Sum	Carry
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

 

Realisation of Half adder

K-Map for Sum

 

Sum = A B’ + A’ B

Sum = A ⊕ B

K-Map for Carry

Carry = A.B

Logical Diagram for Half Adder

 

Full Adder

 

 

 

Truth Table

A	B	Cin	SUM	Cout
0	0	0	0	0
0	0	1	1	0
0	1	0	1	0
0	1	1	0	1
1	0	0	1	0
1	0	1	0	1
1	1	0	0	1
1	1	1	1	1

 

Realisation of Full adder

K-Map for SUM

 

SUM =  AB’C’_IN + A’B’C_IN + ABC_IN + A’BC’_IN

SUM = A ⊕ B ⊕ C_IN

K-Map for Carry

 

C_OUT = AB + AC_IN + BC_IN

Logical Diagram for Half Adder

 

RESULT